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November 17, 2008
MAP2008's program is fixed
MAP2008 will be held from Nov. 26th to 28th.
Since the program of technical presentation is fixed, we will show you the details.
You can see the PDF file.
Please make a on-line registration.
◇The program of technical presentations◇
Thursday 26th, November
12:30 ~ 13:00 Signing Ceremony of Memorandum of Understanding
between ASTSA & ISA
13:00 ~ 13:05 Opening Remark
Hajime Tomokage
Fukuoka University (JAPAN)
13:05 ~ 14:25 Session 1: Invited Talks
13:05 ~ 13:35 1-1 Current and Future Strategy of Indian Semiconductor Industry
Poornima Shenoy
India Semiconductor Association (ISA) (INDIA)
13:35 ~ 14:05 1-2 How Asia ICT Industry Has Transformed : During the Period of Financial Crisis
Colley Hwang
DigiTimes Inc. (TAIWAN)
14:05 ~ 14:25 1-3 Why the profitability of Japan's Major Electric Manufacturers is so Low and Where are
They Going? - The Prospect for the Upcoming Restructuring.
Fumiaki Sato
Merrill Lynch Japan Securities Co., Ltd. (JAPAN)
14:25 ~ 15:00 Coffee Break
15:00 ~ 18:00 Session 2: 3D Integration
(Knowledge Cluster Initiative (The 2nd Stage) Expansion Program, The 4th Workshop)
15:00 ~ 15:30 2-1 Fabrication and Reliability Issues for Through Silicon Via Technologies
Peter Ramm
Fraunhofer IZM (GERMANY)
15:30 ~ 16:00 2-2 Ad-STAC and ITRI`s 3DIC Update
Wei-Chung Lo
Industrial Technology Research Institute (ITRI) (TAIWAN)
16:00 ~ 16:20 Coffee Break
16:20 ~ 16:40 2-3 Development and Production Status on TSV and CoC in Japan
Hirohisa Matsuki
Fujitsu Microelectronics Limited (JAPAN)
Japan Electronics and Information Technology Industries Association (JEITA) (JAPAN)
16:40 ~ 17:00 2-4 Package Warpage at Elevated Temperature
Hirofumi Nakajima
NEC Electronics Corporation (JAPAN)
Japan Electronics and Information Technology Industries Association (JEITA) (JAPAN)
17:00 ~ 17:20 2-5 Google Aided SiP Design Review
Hiroshi Murata
GEM Design Technologies, Inc. (JAPAN)
17:20 ~ 17:40 2-6 Renesas SiP Future 3D Technology
Masashi Umino
RENESAS Technology Corporation. (JAPAN)
17:40 ~ 18:00 2-7 InterViaTM Photodielectric
Wataru Tachikawa
Rohm and Haas Electronic Materials K.K. (JAPAN)
18:00 ~ 18:30 Coffee Break
18:30 ~ 20:00 Reception Party
Thursday 27th, November
09:00 ~ 12:10 Session 3: Green Devices
09:00 ~ 09:30 3-1 Photovoltaic Industry Activities in Korea
Donghan Kim
Korea University (KOREA)
09:30 ~ 10:00 3-2 Introduction to Processes and Prospects of CIGS and Organic Thin Film Solar Cells
Keiichiro Sakurai, Tetsuya Taima
National Institute of Advanced Industrial Science and Technology (AIST) (JAPAN)
10:00 ~ 10:30 3-3 Investment Opportunities in the Solar Industry in Malaysia
Zabidi Mahbar
Malaysian Industrial Development Authority (MIDA) (MALAYSIA)
10:30 ~ 10:40 Coffee Break
10:40 ~ 11:10 3-4 High Bright White LED Packaging Technology and It’s Applications
Atsushi Okuno
Sanyu Rec Co., Ltd. (JAPAN)
11:10 ~ 11:40 3-5 Sapphire and Diamond R&D of Namiki
Kazuhiko Sunagawa
Namki Precision Jewel Co., Ltd. (JAPAN)
11:40 ~ 12:10 3-6 Investment Opportunities in the Solar Industry in Malaysia
Tomomi Yamaguchi
Toshiba Cooperation (JAPAN)
12:10 ~ 13:00 Lunch Break
13:00 ~ 15:50 Session 4: Semiconductor Testing Solution
13:00 ~ 13:20 4-1 Business Model & New Probing Technology
Masahide Ozawa
Tera Probe, Inc. (JAPAN)
13:20 ~ 13:40 4-2 KYEC’s Japan Market Strategy - King Yuan Electronics Co., LTD. (KYEC)
Toshio Sugano
King Yuan Electronics Co., Ltd. (TAIWAN)
13:40 ~ 14:00 4-3 Yokogawa Electric Corporation SoC Tester Strategy
Hirokazu Oooka
Yokogawa Electric Corporation (JAPAN)
14:00 ~ 14:20 4-4 Silicon Netlist to High Volume Production - Opportunities for Time to Market
P. Raj Manickam
Tessolve (INDIA)
14:20 ~ 14:30 Coffee Break
14:30 ~ 14:50 4-5 Chip Defects Inspection System for CIS／MEMS／Flip Chip／Wafer Level CSP
Toshiyuki Yasuda
TOPCON Corporation (JAPAN)
14:50 ~ 15:10 4-6 Chip Test – Semiconductor IC Test Services
M. Sankara
ChipTest Labs Ltd. (INDIA)
15:10 ~ 15:30 4-7 Image Sensor Testing - How to Test for CIS/CCD
Yuji Nakamura
ALDETE Corporation (JAPAN)
15:30 ~ 15:50 4-8 Leadless Molded Packaging
T.Paul Ilanghovan
SPEL Semiconductor Limited. (INDIA)
15:50 ~ 16:05 Coffee Break
16:05 ~ 17:05 Session 5: Design tool and Design Business
16:05 ~ 16:25 5-1 EDA tools for Analog/Mixed-Signal IC and MEMS Layout Design for Circuit Design,
Layout Design and Layout Verification
Yoshiko Shimogaki
Tanner Research Japan K.K. (JAPAN)
16:25 ~ 16:45 5-2 Offshore Outsourcing of LSI Design & Software Development
Joby Joseph V.
Network Systems & Technologies Pte Ltd. (INDIA)
16:45 ~ 17:05 5-3 A Unique 'In-sourcing' Business Model for Offshore Chip-Design and Software
Development Centres
Bala Dhandayuthapani Pachyappa
Auxineon Pte Ltd. (SINGAPORE)
17:05 ~ 17:20 Coffee Break
17:20 ~ 19:00 Session 6: Equipment and Parts
17:20 ~ 17:40 6-1 Molecular Modification of PCB Substrates for Fine Line Patterning: Demonstration of
High Peel Strength, Low Surface Roughness and HAST Survivability of Molecular
Modified Surfaces
Werner Kuhr, Ph.D.
Zetta Core.Inc. (U.S.A.)
17:40 ~ 18:00 6-2 Micro Contact Applied Semiconductor Socket
Shin Yoshida
Alps Electric Co., Ltd. (JAPAN)
18:00 ~ 18:20 6-3 Making Equipment Manufactures More Competitive in the Global Market – the
Introduction of “Monozukuri” at Kitahara Welltec
Kitahara Nobu
Kitahara Welltec, Inc. (JAPAN)
18:20 ~ 18:40 6-4 Factory Automation & Productivity Enhancement
Keiji Matsumoto
Daiichi Institution Industry Co., Ltd. (JAPAN)
18:40 ~ 19:00 6-5 Assembly of Electronics without Solder - Technical Dream or Vision of the Future? Joseph Fjelstad
Verdant Electronics – Silicon Pipe (U.S.A.)
19:00 ~ 20:30 Session 7: Poster Session with Wines
7-1 Electro polishing of Copper for Planarization of TSV in 3D SiP
Jae-ho Lee
Hongik University (KOREA)
Posted by MAP&RTS2005Q : November 17, 2008 03:22 PM